SynTest's TurboFault Simulator Links To Novas Debussy Debug System
SUNNYVALE, Calif.--(BUSINESS WIRE)--Oct. 28, 2002--SynTest
Technologies, Inc., the leading supplier of DFT (Design For Test)
tools and services for SOC (System-On-Chip) design today announced
that its TurboFault(TM) fault simulator, the fastest concurrent fault
simulator based on the latest advances in cycle-based simulation
technology, now has a link to the market-leading Debussy®
Knowledge-based Debug System from Novas Software, Inc.
The TurboFault to Debussy link reduces simulation time and
enhances the productivity of chip designers for debug of SOC designs.
"We are pleased to see the integration of a popular and
high-performance tool such as TurboFault with our debug system," said
George Bakewell, director of technical marketing for Novas. "We
believe our approach of having an accessible knowledge-based
architecture that uses open APIs and a common data model is the most
efficient way for designers to use the tools they want and to maintain
a useful connection between them. The result is faster overall design
cycles and a more productive verification flow."
"We joined the Novas Harmony partner program last year with the
goal of making the debugging and DFT tasks easier for our customers,"
said Finney Tsai, Vice President, R&D, SynTest Technologies. "The
openness of the Novas architecture was key to linking our fault
simulator to Debussy, the industry's leading debug system."
Benefits -- Reduced Simulation Time, Increased Productivity
SynTest's TurboFault fault simulator interfaces directly with the
Debussy Fast Signal Database (FSDB) through Novas' open and extensible
architecture. Debussy uses the FSDB to store results from TurboFault.
With the TurboFault to Debussy link, designers can directly read-in
their existing Debussy waveform database as test patterns to run fault
simulation with TurboFault. This saves simulation time because
designers do not have to run an extra Verilog simulation to create
test patterns for TurboFault. With output waveform data available in
the FSDB format, it is also easier for Debussy users to debug and
verify TurboFault simulation results within the context of schematic
and waveform views. This improves SOC designer productivity during
design debug.
More about Debussy
Novas' Debussy provides an efficient and user-friendly environment
that reduces the time it takes to find the causes of design problems
and to figure out how complex designs work. The system offers a
variety of tools for visualizing and analyzing designs at different
levels of abstraction. Users consistently report that the Debussy
system cuts their debug time in half. Debussy supports standard chip
design and functional verification flows through industry alliances
with more than 25 leading providers of commercial simulators, formal
verification software, and hardware emulators.
More about TurboFault
SynTest's TurboFault uses the latest advances in cycle-based
simulation technology, and can simulate even faster than
hardware-accelerated fault simulators. TurboFault makes fault
simulation an integral design tool for generating a quality
manufacturing test set. It supports single timing delay for simulation
accuracy and flexibility, without sacrificing speed. TurboFault is
also used as a simple diagnostic tool. Its fault-tracing feature
allows users to compare the circuit activities between faulty and
normal chips. This speeds up tuning test vectors; isolating faulty
circuits and debugging failed parts. Waveform data is output in ASCII,
VCD or Novas' FSDB format.
SynTest's TurboFault Price and Availability
TurboFault with the Debussy link is available now from SynTest for
Sun Solaris, HP-UX and Linux operating on PCs networked over a UNIX
server. The price begins at $100,000.00 (USD) for a 3-year license.
About Novas
Novas is the pioneer of knowledge-based debug systems that reduce
the functional verification costs for complex IC designs. Building
upon the strength of its market-leading Debussy Knowledge-Based Debug
System, Novas' second-generation Verdi(TM) Behavior-Based Debug System
improves the efficiency of designers in the system-on-chip era with
advanced design exploration and debug capabilities. These allow design
teams to better understand and analyze complex or unfamiliar design
behavior, and cuts by half or more the time it takes to locate,
isolate and understand the root causes of design problems. There are
more than 7,000 Novas systems in use today at customer sites
worldwide. Novas is headquartered in San Jose, Calif. with offices in
Europe, Japan and Asia-Pacific. For more information visit
www.novas.com or send email to info@novas.com.
About SynTest
SynTest Technologies, Inc., develops and markets advanced
Design-for-Test (DFT) and Design-for-Debug/Diagnosis (DFD) tools,
throughout the world to semiconductor companies, ASIC designers and
test groups. Headquartered in Sunnyvale, CA, the company has offices
in Taiwan, Korea and Japan. The Company's products improve an
electronic design's testability and fault coverage and result in
reduced defect levels, reduced costly tester time, and reduced
slippage in time-to-market. These products include tools for Built-in
Self-Test (BIST) for logic and memory; boundary-scan synthesis; DFT
testability analysis, scan synthesis, ATPG, concurrent fault
simulation, silicon debug and diagnosis. More information is available
at www.syntest.com.
SynTest Technologies Inc. is headquartered at 505 South Pastoria
Ave., Suite 101, Sunnyvale, California 94086, Phone: 408-720-9956,
E-Mail: info@syntest.com
Note to Editors: TurboFault is a trademark of SynTest
Technologies, Inc. Debussy is a registered trademark and Verdi is a
trademark of Novas Software, Inc. All other trademarks or registered
trademarks are the property of their respective owners.
Acronyms
API: Application Programming Interface
ASCII: American Standard Code for Information Interchange
ASIC: Application-Specific Integrated Circuit
ATPG: Automatic Test Pattern Generation
BIST: Built-in Self-Test
DFT: Design-for Test
DFD: Design for Debug / Diagnosis
FSDB: Fast Signal Database
SOC: System-on-Chip
VCD: Value Change Dump
Contact:
ValleyPR for SynTest Technologies
Georgia Marszalek, 650/345-7477
Georgia@ValleyPR.com
or
Novas Software
Lorie Bowlby, 408/467-7871
lorie@novas.com
or
Wired Island, Ltd. for Novas Software
Laurie Stanley, 510/656-0999
laurie@wiredislandpr.com
Source:
SynTest Technologies, Inc.